1. Field of the Invention
The present invention relates to a semiconductor memory device, and particularly to SRAM including an eight-transistor memory cell.
2. Description of the Related Art
In LSI used in portable devices, low power consumption is required to extend battery life. Although lowering of a power supply voltage is effective for the low power consumption, recently a variation in characteristic among elements is increased with the progress of scaling factor, and an operation margin of SRAM used in LSI is reduced to hardly lower an operation voltage of SRAM. Therefore, the power supply voltage of the whole of LSI cannot be lowered by the operation voltage of SRAM.
In a conventional six-transistor memory cell, because a cell node constituting a flip-flop circuit is slightly pulled up in selecting a word line, data in the flip-flop circuit becomes unstable. Therefore, data is broken when the power supply voltage is lowered.
For example, use of an eight-transistor memory cell in which a read port is separated is proposed as countermeasures against the disturb problem (see L Chang, et al., Symposium on VLSI Technology 2004, p128). In the eight-transistor memory cell, even if the word line is selected during data read, the disturb problem can be prevented because the cell node of the flip-flop circuit is not pulled up. However, the eight-transistor memory cell performs the operation similar to that of the conventional six-transistor memory cell during data write.
In order to prevent the disturb problem during the data write, it is necessary that a data write operation be performed to all the memory cells selected by writing word lines. SRAM of LSI has a function of writing only part of data in input data bits, and generally has a byte write function of being able to control whether the data write is performed in units of byte. When the byte write function is supported in the eight-transistor memory cell, the word line is divided in each one byte that is a minimum write unit, and control is performed so as to select only the word line of the byte in which the data write is performed, which prevents the disturb problem during the data write.
Therefore, the low voltage can be realized because the disturb problem is avoided during both the data read and the data write. However, the eight-transistor memory cell performs the data write operation similar to that of the six-transistor memory cell, which results in a problem in that a lower limit value of the operation voltage is determined by the data write characteristic.